1. Field of the Invention
The present invention relates to a semiconductor device and a manufacturing method of the semiconductor device, in particular, to a semiconductor device which includes a capacitor and an interconnection film which is electrically coupled to the capacitor and a manufacturing method of the semiconductor device. This is a counterpart of and claims priority to Japanese Patent Application No. 2004-218880 filed on Jul. 27, 2004, which is herein incorporated by reference.
2. Description of the Related Art
A capacitor which includes a metal-oxide dielectric, in particular, a ferroelectric metal-oxide as a capacitance insulating film is an important element for a memory circuit which uses a ferroelectric material. Strontium Bismuthic Tantalate (SBT: SrBi2Ta2O9) which is a bismuthic stratified compound and Lead Zirconate Titanate (PZT: Pb(Ti, Zr)O3) have been put to practical use. Also, Bismuthic Lanthanum Titanate (BLT: (Bi, La)4Ti3O12) has been researched. When the capacitor is made from the ferroelectric oxide, the capacitor requires annealing at a high temperature (which ranges from 600 to 800 degrees centigrade) in the presence of oxygen in order to restore the characteristics of the sintered or etched ferroelectric. A noble metal such as platinum or iridium which has a high oxidation resistance is therefore used for both of upper and lower electrodes of the capacitor. In particular, platinum is the most often used because it has a higher stability in the process and it is easier to etch. On the other hand, a laminated interconnection structure which includes a plurality of kinds of metallic material is often used as a metallic interconnection which is coupled to the capacitor, in view of reactivity with the upper electrode of platinum. The laminated interconnection structure is, for example, described in pages 2 through 3 and FIG. 1 of a Patent Document 1 (Japanese Patent 3,157,012). The laminated interconnection structure described in Patent Document 1 consists of three films, that is, a titanium nitride film which is a refractory conductive film, an aluminum-silicon alloy film which is a main interconnection film and another titanium nitride film which is an antireflective film.
Generally, the noble metallic material as represented by platinum has a low degree of reactivity to other materials. Therefore, a boundary separation easily occurs at an interface between the noble metallic material and the other material, for example, the ferroelectric or an insulating layer. Especially, a metallic interconnection film, which is coupled to the upper electrode of the capacitor including the noble metallic material, has a residual stress which causes the boundary separation at the metallic interconnection film and the upper electrode of the capacitor.
Meanwhile, platinum which represents the noble metallic material excessively reacts with aluminum which is often used as the interconnection film through thermal treatment. It is known that the excessive reaction induces quality deterioration of the aluminum interconnection film. In order to suppress the quality deterioration, a barrier metallic film is generally formed between the aluminum interconnection film and the platinum upper electrode. The barrier metallic film includes titanium nitride. Alternatively, a single film including titanium nitride may be used as the metallic interconnection film. However, a direction of residual stress of the titanium nitride film is different than a direction of residual stress of the upper electrode including the platinum. That is, the titanium nitride film has a compressive residual stress and the upper electrode including the platinum has a tensile residual stress against a principal surface of a semiconductor substrate. As a result, the above-described boundary separation may easily arise.
FIG. 1 is a schematic sectional view for describing a semiconductor device 1A which has a capacitor and a metallic interconnection film coupled to each other in the related art. The semiconductor device 1A has a semiconductor substrate 1, a first interlayer insulating film 2, a lower electrode 3, a capacitance insulating film 4, an upper electrode 5, a second interlayer insulating film 6, a third interlayer insulating film 8 and a metallic interconnection film 10. The lower electrode 3, the capacitance insulating film 4 and the upper electrode 5 constitute the capacitor. The metallic interconnection film 10 includes titanium nitride and is coupled to the upper electrode 5 of the capacitor. In FIG. 1, the arrows represent directions of residual stresses in the capacitor and the metallic interconnection film 10. The residual stresses directions of the lower electrode 3, the capacitance insulating film 4 and the upper electrode 5 are the same as one another, that is, these stresses constitute tensile residual stresses against a principal surface of the semiconductor substrate 1. Meanwhile, the residual stress of the metallic interconnection film 10 which includes the titanium nitride is a compressive residual stress against the principal surface of the semiconductor substrate 1. That is, the direction of residual stress of the metallic interconnection film 10 is different than the residual stresses of the upper electrode, the capacitance insulating film and the lower electrode. The difference between the above-described residual stresses may cause the boundary separation at an interface A between the second interlayer insulating film 6 and the upper electrode 5, an interface between B the upper electrode 5 and the capacitance insulating film 4, an interface C between the capacitance insulating film 4 and the lower electrode 3, or an interface D between the lower electrode 3 and the first interlayer insulating film 2. For example, adhesiveness between the metallic interconnection film 10 and the second interlayer insulating film 6 is greater than adhesiveness between the upper electrode 5 and the second interlayer insulating film 6, and the metallic interconnection film 10 pulls upward the second interlayer insulating film 6 in a contact hole 9. As a result, the boundary separation between the metallic interconnection film 10 and the second interlayer insulating film 6 arises at a sidewall of the contact hole 9. Also, a shearing stress at a bottom of the contact hole 9 accelerates the boundary separation.
As seen in the Patent Document 1, the laminated interconnection film has three films that include a lower titanium nitride film which has the compressive residual stress, a middle aluminum-silicon alloy film which has the tensile residual stress and an upper titanium nitride film which has the compressive residual stress. Thus, a whole stress of the laminated interconnection film is controlled by the three films so that the distortion of the semiconductor substrate 1 may be decreased. In the Patent Document 1, the above-described stresses cancel one another only by themselves without using any other residual stresses of other configuration patterns such as the residual stress of the capacitor. Also, the Patent Document 1 does not disclose at all any adverse effects of the residual stress of the metallic interconnection film 10 to the other configuration patterns, for example, the boundary separation.